1. Field of the Invention
The invention relates generally to USB bridges and more specifically to PHY-less ULPI and UTMI bridges.
2. Background of the Invention
A traditional interface between two USB (universal serial bus) devices uses a complete mixed-signal physical (PHY) layer, which often includes more than 50 parallel electrical connections, such as defined by the USB 2.0 UTMI (Universal Transceiver Macrocell Interface) standard. An enhanced UTMI+standard builds on the UTMI standard to add support for a HS OTG (Hi-Speed USB 2.0 On-The-Go) PHY interface. The UTMI/UTMI+ standards allow a USB peripheral and a host to communicate data at high speeds, however, using the large number of physical electrical connections. One solution to reduce the number of electrical connections in the USB PHY interface is defined in the ULPI (UTMI+Low Pin Interface) standard. This ULPI standard builds on the earlier UTMI+PHY interface standard and reduces the interface count to 8 to 12 connections, however adds latency to communication between the USB device and USB host.
As the USB standard becomes more ubiquitous, system designers have also adopted chip-to-chip interconnection of these USB devices. Traditionally, for two USB devices to communicate with each other at the chip level, each requires a PHY interface port: a first interface port for upstream data to the host; and a second interface port for downstream data to the device. This PHY interface logic contains both digital processing logic and power consuming analog transceivers. PHY interfaces running at high-speeds may consume over 50 mA (milli Amperes) of power.
Designs requiring a PHY interface on each side of the host-to-device connection may be expensive, consume a high amount of power during operation, complex and require excess board space. Therefore, a need exists with ULPI systems to significantly reduce the interface signals to approximately 8 to 12 pins, reduce latency and potentially reduce system cost, routing complexity and used board space.